EECS427 Coursework Project
Duration: 09/2021-01/2021
Teammates: Yuanqi Guo, Sierra Wang, Ziyu Wang, Xiangdong Wei, Zhengqi Xu
Introduction
Reduced instruction set computer(RISC) is microsystems/computer designed to simplify the individual instructions given to the computer to accomplish tasks. Though it need more instructions to accomplish a task compared to a complex instruction set computer(CISC), it could process the instructions in a higher speed. In this project, The RISC-V is designed with 46 instructions including addition, multiplication, multiply-and-accumulate(MAC) and so on. The compute-in-memory(CIM) processing element is designed and fine-tuned to accelerate MAC computation.
Modules
There are five main modules involves in the RISC processor, which are Register File(RF), Arithmetic and Logic Unit(ALU), Shifter, Controller, SRAM. In this part, design and performance of each modules will be explained in detailed.